发明名称 Enhanced multiprocessor response bus protocol enabling intra-cache line reference exchange
摘要 System bus snoopers within a multiprocessor system in which dynamic application sequence behavior information is maintained within cache directories append the dynamic application sequence behavior information for the target cache line to their snoop responses. The system controller, which may also maintain dynamic application sequence behavior information in a history directory, employs the available dynamic application sequence behavior information to append "hints" to the combined response, appends the concatenated dynamic application sequence behavior information to the combined response, or both. Either the hints or the dynamic application sequence behavior information may be employed by the bus master and other snoopers in cache management.
申请公布号 US6704843(B1) 申请公布日期 2004.03.09
申请号 US20000696890 申请日期 2000.10.26
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 ARIMILLI RAVI K.;DODSON JOHN STEVEN;FIELDS, JR. JAMES STEPHEN;GUTHRIE GUY LYNN
分类号 G06F12/08;(IPC1-7):G06F12/08 主分类号 G06F12/08
代理机构 代理人
主权项
地址