发明名称 |
selective bypassing of a multi-port register file |
摘要 |
A multi-port register file may be selectively bypassed such that any element in a result vector is bypassed to the same index of an input vector of a succeeding operation when the element is requested in the succeeding operation in the same index as it was generated. Alternatively, the results to be placed in a register file may be bypassed to a succeeding operation when the N elements that dynamically compose a vector are requested as inputs to the next operation exactly in the same order as they were generated. That is, for the purposes of bypassing, the N vector elements are treated as a single entity. Similar rules apply for the write-through path.
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申请公布号 |
US2004044882(A1) |
申请公布日期 |
2004.03.04 |
申请号 |
US20020230492 |
申请日期 |
2002.08.29 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
ASAAD SAMEH;MORENO JAIME H.;ZYUBAN VICTOR |
分类号 |
G06F9/30;G06F9/38;G06F15/80;(IPC1-7):G06F9/30 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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