发明名称 DMA controller and DMA transfer method
摘要 A DMA channel data quantity setting section sets a data transfer quantity of each of a plurality of DMA channels in accordance with a data quantity or a ratio in advance. A channel select control circuit determines whether each DMA channel is active. A data transfer control circuit transfers the data of the DMA channel determined to be active by the channel select control circuit in accordance with the data transfer quantity of each DMA channel set by the DMA channel data quantity setting section. By doing so, a plurality of DMA requests are accepted per bus hold request, and the number of bus management right arbitration procedures and the latency between the channels are decreased.
申请公布号 US2004044809(A1) 申请公布日期 2004.03.04
申请号 US20030642145 申请日期 2003.08.18
申请人 FUJITSU LIMITED 发明人 TAKASHIMA KAZUHITO;HORIE HIROMITSU;TARUI YUJI
分类号 G06F13/28;(IPC1-7):G06F13/28 主分类号 G06F13/28
代理机构 代理人
主权项
地址