发明名称 |
HOST INTERFACE CIRCUIT FOR COPROCESSOR |
摘要 |
PROBLEM TO BE SOLVED: To provide a host interface circuit for coprocessor capable of raising the portability of both hardware and software by suppressing the dependency with a microprocessor low. SOLUTION: This host interface circuit for coprocessor has an internal address bus S41; an internal strobe bus S51; an address command decoder part 101 for generating a command S7 and an operand S8 from the information encoded to an address on the internal address bus S41; a host decoder part 91 for decoding the write/read request to a data register part 5 and a control register part 6 from the microprocessor 1 by the address on the internal address bus S41 and a strobe signal on the internal strobe bus S51 to generate a host access signal S9; and an FSM part 71 for performing the control of an arithmetic part 4. COPYRIGHT: (C)2004,JPO
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申请公布号 |
JP2004070819(A) |
申请公布日期 |
2004.03.04 |
申请号 |
JP20020231577 |
申请日期 |
2002.08.08 |
申请人 |
YASKAWA ELECTRIC CORP |
发明人 |
KASHIWAGI YOSHITAKA;SODA RYUICHI |
分类号 |
G06F9/38;G06F15/16;(IPC1-7):G06F9/38 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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