发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To increase the speed for reading data signals at a low cost without depending on particular processing when manufacturing the memory. SOLUTION: A delay inverter circuit 10 is composed of an enhancement mode transistors Tr2, Tr3, and outputs read signals RS1 obtained by delaying the clock signals CK2 inputted from the outside. In other words, the power supply voltage is dropped for the delay inverter circuit 10 by using an enhanced mode transistor Tr1 which does not require particular processing, and the speed is made high for reading the data signal at the higher voltage side of the standard voltage within the tolerable power supply voltage. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004071027(A) 申请公布日期 2004.03.04
申请号 JP20020227416 申请日期 2002.08.05
申请人 FUJITSU LTD 发明人 UETAKE TOSHIYUKI
分类号 G11C11/419;(IPC1-7):G11C11/419 主分类号 G11C11/419
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