| 摘要 |
1,020,845. Electric selective signalling. ASSOCIATED ELECTRICAL INDUSTRIES Ltd. Dec. 22, 1964 [Jan. 2, 1964], No. 210/64. Heading G4H. In an analogue-to-digital converter, when a sweep voltage reaches a datum level it is biased away from the datum level by the analogue input voltage and clock pulses are gated to a counter from this time until the biased sweep voltage returns to the datum level. In the particular embodiment, the analogue input voltage represents the load on a conveyer and the sweep voltage is triggered to produce sampling of the input at a rate proportional to the conveyer speed. The datum level is reached for the first time when the ramp has progressed far enough to cancel a fixed voltage from a potentiometer which ensures that the non- linear part of the ramp is avoided during counting. The counter produces a total count for a plurality of successive samplings, and a rate meter gives a smoothed average of several successive samplings. |
