| 摘要 |
The present invention provides for a timing and control circuitry comprising a system clock generator (36) associated with processing means (28) and arranged for receiving power from power supply means (30), a second clock arranged to operate at a clock frequency slower than that of the system clock (36), means (38) for selectively disabling the system clock so as to enter a power-saving mode in which the processing means (28) operates in accordance with the second clock, the circuit further being arranged with means (38) for decreasing power supplied by the said power supply means (30) for a period during which the system clock (36) is disabled. In a preferred embodiment, the processing means comprises baseband processing means of a mobile radio communications device. |
