| 摘要 |
PURPOSE: A method for controlling a /CAS signal of a semiconductor memory device is provided to reduce a data access time and enhance total speed of a DRAM by receiving the column address in a transition process of the /CAS signal from the high level to the low level or from the low level to the high level. CONSTITUTION: A /CAS pre-fetch signal is outputted as a high level pulse whenever a transition process of the /CAS signal is performed. Data assigned by a column address are outputted by latching the column address when the /CAS pre-fetch signal is changed from a low level to a high level. The column address is latched when the /CAS signal is changed from the high level to the low level or the low level to the high level.
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