发明名称 |
DUAL-GATE STRUCTURE AND METHOD OF FABRICATING INTEGRATED CIRCUITS HAVING DUAL-GATE STRUCTURES |
摘要 |
PURPOSE: A method of fabricating a dual-gate on a substrate and an integrated circuit having a dual-gate structure are provided to easily form the dual gate with clean surface and good hardness by using a first dielectric layer as an etch stop layer. CONSTITUTION: A first high-K dielectric layer(14A,14B) is formed in a first area(10A) defined for a first gate structure and in a second area(10B) defined for a second gate structure. A second high-K dielectric layer(16A) is formed in the first and second areas. The first high-K dielectric layer has a lower etch rate to an etchant relative to the second high-K dielectric layer. The second high-K dielectric layer(16A) is etched from the second area to the first high-K dielectric layer with the etchant. A gate conductive layer is formed in the first and second areas(10A,10B) over the second high-K dielectric layer and first high-K dielectric layer, respectively.
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申请公布号 |
KR20040018225(A) |
申请公布日期 |
2004.03.02 |
申请号 |
KR20030058437 |
申请日期 |
2003.08.22 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
HOU TUO HUNG;WANG MING FANG;CHEN CHI CHUN;YANG CHIH WEI;YAO LIANG GI;CHEN SHI CHANG |
分类号 |
H01L21/306;H01L21/311;H01L21/336;H01L21/8234;H01L27/088;H01L29/78;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/306 |
代理机构 |
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代理人 |
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地址 |
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