| 摘要 |
PURPOSE: A stack chip package is provided to decrease the size of a package by reducing the vertical height of the package as compared with that of a conventional stack chip package, and to shorten an interval of fabricating time by eliminating the necessity of a process such as a lead bending process. CONSTITUTION: A semiconductor chip(10) has a plurality of bonding pads(11). The inner end of a lead(21) of a leadframe is of a convex type. A predetermined space between inner leads is formed in the leadframe. Insulating adhesion tape is attached to a lower surface of a lead end part having a decreased thickness and to the lower surface of the semiconductor chip so as to fix the semiconductor chip. The bonding pad is electrically connected to the leadframe by a bonding wire(32). A plurality of vertically stacked unit semiconductor chip packages(50) have resin encapsulant(34) that exposes the side surface of the leadframe and protects the lead from the outer environments. A junction unit is attached to each lead of the unit semiconductor chip package to perform a vertical electrical connection.
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