发明名称 |
Method for the determination of resistances and capacitances of a circuit diagram, which represents an electrical circuit |
摘要 |
From a circuit diagram, an electrically connected circuit diagram network is selected. From a layout representing the circuit diagram, an electrically connected layout network is selected that represents the circuit diagram network. A first electrical terminal connection of a first component is selected that connects the first component with the circuit diagram network or with the layout network. A second electrical terminal connection of a second component is selected that connects the component with the circuit diagram network or with the layout network. A first electrical moment is calculated for the transmission path of the layout. A second moment of the corresponding transmission path of the circuit diagram is calculated. A relationship between the first moment and the second moment is predetermined. A value of a resistor or a value of the capacitor of the circuit diagram is now modified in such a way that the relationship is satisfied.
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申请公布号 |
US6701492(B2) |
申请公布日期 |
2004.03.02 |
申请号 |
US20020057125 |
申请日期 |
2002.01.25 |
申请人 |
INFINEON TECHNOLOGIES AG;CADENCE DESIGN SYSTEMS, INC. |
发明人 |
JAKLIC JANEZ;PADBERG CHRISTOPH;HILDEBRAND GERD;KLEE SUSANNE |
分类号 |
G06F17/50;H01L27/08;(IPC1-7):G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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地址 |
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