| 摘要 |
A multiprocessor system includes a plurality of system modules each having a plurality of processors, a transfer controller and a first crossbar, a crossbar module including a second crossbar, a control bus coupling the transfer controller of each of the system modules to the crossbar module, and a data bus coupling the first crossbar of each of the system modules to the crossbar module. Within an arbitrary one of the system modules, the first crossbar outputs a data packet to the data bus in response to a command signal from the transfer controller after the transfer controller outputs a control information packet to the control bus.
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