| 摘要 |
On a first stage of the delta sigma type AD converter for quantizing an input analog signal and converting it to an output digital signal. The computing element adds a feedback signal from a second stage DA converter and subtracts a feedback signal in which the output of the delay unit is multiplied at a coefficient alpha with a coefficient buffer and a feedback signal from the delay unit, the input analog signal is output to a computing element on a post stage, and quantization is executed with a predetermined sampling frequency by a quantizing element so as to convert it to an output digital signal. The frequency characteristic of quantization noise Q(Z) to be added by the quantizing element can be adjusted with the coefficient alpha, so that the relationship between the sampling frequency and the input frequency can be set up appropriately.
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