| 摘要 |
In a fault-tolerant system, single or multiple line faults between two assemblies (BG1, BG2), modules or circuits (IC1, IC2) should not lead to a system failure. In addition, it should be possible with minimal outlay to detect or repair a single line fault, or to change over to a fallback line, without impairing the redundancy of the system, its functionality or performance. Known solutions only achieve this by means of costly circuitry and by the provision of several additional lines (E). For instance, for a bus having a width of 64 bits, an 8-bit ECC is required to correct a single bit error. According to the invention, a detection method and a correction method as well as a circuit arrangement are provided which solve the problem by executing a checking routine on every single line (N, E), whereby all errors are reliably detected. By virtue of the reliable detection, only one additional fallback line (E) need be provided for each single line error to be corrected, to which fallback line a switchover is made in the event of an error.
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