发明名称 CONNECTION VERIFICATION DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a connection verification device capable of verifying connection relation between a plurality of logical blocks without verifying the logical processing of the logical block. SOLUTION: The signal level of the output terminals Y1-Yn of a BLK-Y 11 is compared with the signal level of the input terminals A1-An of a BLK-A 14 and the connection relation between the BLK-Y 11 and a BLK-A 14 is verified. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004062532(A) 申请公布日期 2004.02.26
申请号 JP20020220061 申请日期 2002.07.29
申请人 RENESAS TECHNOLOGY CORP 发明人 HASHIZUME TAKESHI
分类号 G01R31/317;G06F17/50;H01L21/82;(IPC1-7):G06F17/50 主分类号 G01R31/317
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