发明名称 Clock-synchronous semiconductor memory device
摘要 A semiconductor device comprises a memory cell array, a counting circuit, a control circuit, a specification circuit, a selection circuit and a data I/O circuit. The selection circuit effects switching between a normal mode and a synchronous mode in a mode setting cycle. In the normal mode, setting of addresses is performed irrespective of a clock signal. In the synchronous mode, an edge of the clock signal determines the timing of operation.
申请公布号 US2004037126(A1) 申请公布日期 2004.02.26
申请号 US20030642624 申请日期 2003.08.19
申请人 发明人 TODA HARUKI;KUYAMA HITOSHI
分类号 G11C7/10;G11C8/04;(IPC1-7):G11C29/00 主分类号 G11C7/10
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