摘要 |
PROBLEM TO BE SOLVED: To easily detect a jitter of clock signal with a simple constitution. SOLUTION: An input part 1 is connected to one terminal of a delay element 2 and one terminal of an EX (exclusive)-OR circuit 3, and the other terminal of the delay element 2 is connected to the other terminal of the EX-OR circuit 3. An output part of the EX-OR circuit 3 is connected to one terminal of a resistance part 4 and a clock input part of a following F/F circuit 5, and the other terminal of the resistance part 4 is connected to the ground. A data input part of the F/F circuit 5 is connected to a VCC, and the output part of the F/F circuit 5 is connected to one terminal of a light emitting diode 6, and the other terminal of the light emitting diode 6 is connected to the ground. Hereby, inclusion of a jitter in the clock signal outputted from a clock generation circuit can be easily detected by the simple constitution. COPYRIGHT: (C)2004,JPO
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