发明名称 METHOD AND SYSTEM FOR EFFICIENTLY PERFORMING RTL POWER ESTIMATION
摘要 PROBLEM TO BE SOLVED: To enhance the efficiency and scalability of a power estimation tool for large-scale RTL circuit design. SOLUTION: In a method for accelerating power estimation of a circuit, RTL description of the circuit is generated, power model expansion RTL description of the circuit is generated, a simulator to be executed is selected, the power model extension RTL description is changed to the contents suitable for the simulator and power consumption of the circuit is estimated by executing the simulator. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004062902(A) 申请公布日期 2004.02.26
申请号 JP20030201969 申请日期 2003.07.25
申请人 NEC CORP 发明人 RAVI SRIVATHS;RAGHUNATHAN ANAND;CHAKRADHAR SRIMAT
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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