| 摘要 |
<P>PROBLEM TO BE SOLVED: To suppress semiconductor loss to a minimum as a whole even when conductance loss becomes larger than switching loss due to a decrease in carrier frequency and a decrease in three-phase voltage command, when using a two-phase modulation system. <P>SOLUTION: The conductance loss (Wlos1) when not performing PWM is calculated (step 102), and the semiconductor loss (Wlos2) when performing PWM is calculated (step 103). In a step 104, when the semiconductor loss Wlos 2 is not larger than the conductance loss Wlos1, a PWM waveform is generated by using the two-phase modulation system in this embodiment (step 105). On the other hand, in the step 104, when the semiconductor loss Wlos2 is not smaller that the conductance loss Wlos1, the PWM waveform is generated by using a conventional two-phase modulation system (step 106 in Fig. 7(not shown)). <P>COPYRIGHT: (C)2004,JPO |
