发明名称 SYSTEM AND METHOD FOR PACKET STORAGE AND RETRIEVAL
摘要 A network services processor receives, stores, and modifies incoming packets and transmits them to their destination. The network services processor stores packets as buffers in main and cache memory ( 104/108, 235) for manipulation and retrieval. A memory subsystem stores packets as linked lists of buffers. Each bank of memory includes a separate memory management controller for controlling accesses to the memory bank. The memory management controllers, a cache management unit, and free list manager shift the scheduling of read and write operations to maximize overall system throughput. For each packet, packet context registers are assigned, including a packet handle that points to the location in memory of the packet buffer. The contents of individual packets can be accessed through the use of encapsulation pointer registers that are directed towards particular offsets within a packet, such as the beginning of different protocol layers within the packet.
申请公布号 WO03067799(A3) 申请公布日期 2004.02.26
申请号 WO2003US03292 申请日期 2003.02.04
申请人 INTEL CORPORATION 发明人 HENDERSON, ALEX;CROFT, WALTER
分类号 G06F;G06F3/00;G06F17/50;H04J3/14;H04J3/16;H04L;H04L12/24;H04L12/28;H04L12/54;H04L12/56;H04Q11/00 主分类号 G06F
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