发明名称 EEPROM structure, has an additional gate or substrate capacitor on each cell
摘要 An EEPROM for a non-volatile semiconductor memory. A cell comprises a floating gate transistor with hot electron writing and Fowler-Nordheim tunneling current deletion. There is an additional gate capacitor and/or substrate capacitor at each cell so that a common writing voltage is applied to the floating gates of all cells. An Independent claim is also included for an integrated circuit having an EEPROM as above.
申请公布号 DE10235072(A1) 申请公布日期 2004.02.26
申请号 DE20021035072 申请日期 2002.07.31
申请人 MICRONAS GMBH 发明人 FRERICHS, HEINZ-PETER
分类号 G11C16/04;H01L21/336;H01L21/8247;H01L27/115;H01L29/423;(IPC1-7):H01L27/115 主分类号 G11C16/04
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