| 摘要 |
PROBLEM TO BE SOLVED: To sufficiently reduce an electric power consumption as to an address conversion buffer, without deteriorating speed performance of the address conversion buffer. SOLUTION: The address conversion buffer for converting a logical address into a physical address is provided with a clock-enable generation circuit 140 for stopping an operation clockϕi supplied to a tag storage part and an entry storage part of the address conversion buffer, during a virtual memory valid bit Vs of a status register for expressing an access to virtual memory is "0", during a cache stall signal is brought into a mishit condition in a cache, or when the access is carried out in the same logical page address and in a site other than boundary of an address range thereof. COPYRIGHT: (C)2004,JPO
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