发明名称 CMOS aps with stacked avalanche multiplication layer and low voltage readout electronics
摘要 An image sensor includes a pixel having a protection circuit connected to a charge multiplying photoconversion layer. The protection circuit prevents the pixel circuit from breaking down when the voltage in the pixel circuit reaches the operating voltage applied to the charge multiplying photoconversion layer in response to the image sensor being exposed to a strong light. The protection circuit causes additional voltage entering the pixel circuit from the charge multiplying photoconversion layer over a predetermined threshold voltage level to be dissipated from the storage node and any downstream components.
申请公布号 US2004036786(A1) 申请公布日期 2004.02.26
申请号 US20020226190 申请日期 2002.08.23
申请人 TAKAYANAGI ISAO;NAKAMURA JUNICHI 发明人 TAKAYANAGI ISAO;NAKAMURA JUNICHI
分类号 G01J1/00;G01T1/24;H01J40/00;H01L21/00;H01L27/02;H01L27/146;H01L29/04;H01L31/10;H01L31/20;H04N3/15;H04N5/355;(IPC1-7):H04N5/335 主分类号 G01J1/00
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