| 摘要 |
PROBLEM TO BE SOLVED: To efficiently arbitrate memory access. SOLUTION: A processor is provided with a memory access arbitration circuit 103 for arbitrating a plurality of memory accesses. A display control unit 104 informs the memory access arbitration circuit 103 of an output priority mask signal giving priority to display processing for a prescribed period. While the output priority mask signal is valid, the memory access arbitration circuit 103 waits for performance even if a memory transfer request except for display is given, and priority is given to the display processing. The memory access arbitration circuit 103 previously informs the memory access arbitration circuit 103 of a transfer amount that the display control unit 104 transfers in one horizontal period. The memory access arbitration circuit 103 opens a memory bus 112 to the other memory transfer based on comparison between the memory access transfer amount and a threshold. COPYRIGHT: (C)2004,JPO
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