发明名称 Selective polysilicon stud growth
摘要 A memory cell having a bit line contact is provided. The memory cell may be a 6F<2 >memory cell. The bit line contact may have a contact hole bounded by insulating sidewalls, and the contact hole may be partially or completely filled with a doped polysilicon plug. The doped polysilicon plug may have an upper plug surface profile that is substantially free of concavities or substantially convex. Similarly, a storage node contact may comprise a doped polysilicon plug having an upper plug surface profile that is substantially free of concavities or that is substantially convex. Additionally, a semiconductor device having a conductive contact comprising a polysilicon plug may be provided. The plug may contact a capacitor structure.
申请公布号 US2004038476(A1) 申请公布日期 2004.02.26
申请号 US20030612333 申请日期 2003.07.02
申请人 TRAN LUAN 发明人 TRAN LUAN
分类号 H01L21/8242;H01L27/02;(IPC1-7):H01L21/823;H01L21/824;H01L27/10 主分类号 H01L21/8242
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