| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a pipeline circuit capable of accessing an intermediate register of each stage and using an arbitrary continuous stage of the pipeline. <P>SOLUTION: A data bus 6 is connected to an input register 1, intermediate registers 4<SB>1</SB>, 4<SB>2</SB>to 4<SB>N-1</SB>, and an output register 2 and a strobe signal which specifies a register and determines an operation for the register is supplied from a strobe bus 5. A pipeline constitution table 7 comprises bits corresponding to each intermediate register 4<SB>1</SB>to 4<SB>N-1</SB>and the output register 2. AND gates 8<SB>1</SB>, 8<SB>2</SB>to 8<SB>N</SB>calculate logical product between output signals S<SB>21</SB>, S<SB>22</SB>to S<SB>2N</SB>of a pipeline controller 9 and each bit output S<SB>31</SB>, S<SB>32</SB>to S<SB>3N</SB>of the pipeline constitution table 7 to control the writing of the operation result of each stage such as the intermediate registers 4<SB>1</SB>, 4<SB>2</SB>to the output register 2. <P>COPYRIGHT: (C)2004,JPO |
