发明名称 WIRING LAYER STRUCTURE AND ITS FORMING METHOD
摘要 PROBLEM TO BE SOLVED: To determine a method for determining a reference maximum-wiring-width and an efficient arrangement reference of slit dummies to minimize increases in required wiring width in a wiring method by damascene method. SOLUTION: A method capable of providing a reliable wiring with a variation in its resistance decreased comprises the steps of determining the reference maximum-wiring-width according to an allowable wiring resistance, and suppressing dishing by chemical mechanical polishing (CMP) by efficiently arranging split dummies in the wiring layer by use of the arrangement reference introduced from the reference maximum-wiring-width for the wiring width exceeding the determined reference maximum-wiring-width. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004063702(A) 申请公布日期 2004.02.26
申请号 JP20020218878 申请日期 2002.07.26
申请人 OKI ELECTRIC IND CO LTD 发明人 YOSHIE TORU
分类号 H01L21/3205;H01L21/321;H01L21/768;H01L21/82;H01L23/52;H01L23/528;(IPC1-7):H01L21/320 主分类号 H01L21/3205
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