Synchronous memory with open page

摘要

A synchronous memory device includes an array of memory cells. During a read operation data from a row of the array is stored in a latch circuit and randomly read. The memory device can be placed in a low power consumption mode where a voltage pump circuit used to provide an access voltage is powered down. The time required to restart the voltage pump typically limits the speed in which data in the array can be read following a low power mode. The memory device maintains power to the latch circuit during the low power mode such that the latched data can be read following a low power mode without waiting for the pump circuit to reach a stable output voltage level.