| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a technique for reducing a through current and a technique for optimizing a column selection timing in a semiconductor device. <P>SOLUTION: The device is provided with a write Y selection line (WYS) for controlling operation of column selection switches 112 and 114 in a write amplifier 110, and a read Y selection line (RYS) for controlling operation of column selection switches 121 and 123 in a read amplifier 120 separately from each other. By setting the column selection switches 121 and 123 in non-operating condition in the read amplifier 120 at the time of writing, the through current at the time of writing is reduced. In this case, a write IO line and a read IO line are arranged so that they cross a sense amplifier column, and the write column selection line and the read column selection line are arranged in parallel to the sense amplifier column. <P>COPYRIGHT: (C)2004,JPO |
