发明名称 NOVEL METHODOLOGY TO OBTAIN INTEGRATED PROCESS RESULTS PRIOR TO PROCESS TOOLS BEING INSTALLED
摘要 In accordance with the objectives of the invention a new methodology is provided that assures that integrated process results are verified and assured prior to the installation of processing tools as part of modifying or updating of a semiconductor manufacturing foundry. The complete semiconductor manufacturing complement of processing tools is sub-divided into short-loops or sub-modules, which are then combined into a full loop. This combination of sub-modules into modules that closer approach a full complement of processing tools can be accomplished in a gradual manner, whereby one or more sub-loops are first combined and evaluated, to this combination one or more additional sub-groups may be added whereby each of these latter sub-groups may also have been created by combining one or more (original) sub-loops. This process is continued to the point where a full complement of process equipment has been created, completing the full processing loops of the semiconductor manufacturing facility.
申请公布号 US2004039472(A1) 申请公布日期 2004.02.26
申请号 US20020225804 申请日期 2002.08.22
申请人 CHARTERED SEMICONDUCTOR MANUFACTURING LTD. 发明人 SHU CHENG CHOR;HOON CHO NAM;KONG LEONG CHEE;BENYON PETER;CHAM JOHNNY;WONG GEORGE;EE NEOH SOON
分类号 G05B19/418;G06Q50/00;H01L21/00;H01L21/02;(IPC1-7):G06F19/00 主分类号 G05B19/418
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