发明名称 MEMORY MODULE AND MEMORY SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a memory system capable of coping with high speed, not generating reflection signals on a transmission wire path, and stub-connected with a plurality of memory modules. SOLUTION: A connector 42 mounted to a memory module 30 is connected by stub with a transmission busline 43 connected with a memory controller 41. A stub resistance is connected with the memory module between a transmission busline 32 and a pin 33. A resistance value Rs of the stub resistance and a resistance value Rterm of a terminal end resistance 34 are expressed as follows. Rs=(n-1)×Zeffdimm/n, and Rterm=Zeffdimm, where Zeffdimm is an actual effect impedance of a memory chip arrangement part comprising the transmission busline and a memory chip 31. A wiring impedance Zmb of a motherboard is expressed as Zmb=(2n-1)×Zeffdimm/n<SP>2</SP>. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004062530(A) 申请公布日期 2004.02.26
申请号 JP20020220048 申请日期 2002.07.29
申请人 ELPIDA MEMORY INC 发明人 SHIBATA KAYOKO;NISHIO YOJI;SENBA SEIJI
分类号 G06F13/16;G06F12/00;G11C11/4063;H05K1/02;(IPC1-7):G06F13/16 主分类号 G06F13/16
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