Use of a cache ownership mechanism to synchronize multiple dayclocks

摘要

A method of and apparatus for improving the efficiency of a data processing system employing multiple dayclocks using the facilities which maintain coherency of the system's level cache memories. These efficiencies result from dedicating a separate individual dayclock to each of the multiple instruction processors within the data processing system thereby decreasing access time and user queuing. These individual dayclocks are each incremented at one microsecond intervals. However, these individual dayclocks require periodic synchronization to avoid system level time-tagging problems. This synchronization occurs at 20 microsecond intervals using the cache coherency maintenance hardware of the system.