发明名称 Pulse integrating circuit
摘要 1,048,469. Electric analogue calculating NIHON GENSHIRYOKU KENKYU SHO. April 3, 1964 [April 6, 1963], No. 13855/64. Heading G4G. A pulse integrating circuit comprises a first pulse integrator, charging capacitor C4 to an extent dependent on the number and amplitude of random positive-going pulses received at 31 and a second integrator which charges capacitor C5 to an extent dependent on the number of negative-going periodic gating pulses received at 41, the two capacitors being coupled together via resistance. As described, each integrator comprises an emitter follower 36 or 46 and a diode 37, 47 to ensure that the voltage across each integrating diode 33, 44 is independent of the charge on capacitors C4, C5. The output at 53 consists of regular pulses, the amplitude of each being proportional to the integral of the random input pulses occurring during the immediately preceding time following the previous gating pulse.
申请公布号 GB1048469(A) 申请公布日期 1966.11.16
申请号 GB19640013855 申请日期 1964.04.03
申请人 NIHON GENSHIRYOKU KENKYU SHO 发明人
分类号 G01T1/15;G06G7/184;H03M1/00 主分类号 G01T1/15
代理机构 代理人
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