| 摘要 |
<P>PROBLEM TO BE SOLVED: To improve characteristics of a device by lowering the gate resistance of a power MISFET. <P>SOLUTION: A gate electrode GE is electrically connected with a gate formed of a polycrystalline silicon film inside a plurality of grooves formed in stripe shaper in the Y direction of a chip area CA. The gate electrode GE is formed of a film in the same layer as a source electrode SE electrically connected to a source region formed between the stripe grooves. Moreover, the gate electrode GE comprises a gate electrode G1 formed along the periphery of the chip area CA, and a gate finger G2 so located as to divide the chip region CA into two parts in the X direction. Meanwhile, the source electrode SE comprises a portion located above the gate finger G2 and a portion located below the gate finger G2. The gate electrode GE and the source electrode SE are connected to a lead frame via a bump electrode. <P>COPYRIGHT: (C)2004,JPO |
