发明名称 VIA PROGRAMMABLE GATE ARRAY INTERCONNECT ARCHITECTURE
摘要 A segmentation architecture for wiring segments which provides interconnections for a gate array integrated circuit is described. Programming is provided by selectable vias between wiring segments and to the semiconductor substrate surface. The wiring segments of two interconnection layers are arranged in two directions and a programmable buffer can drive signals in a selectable direction depending upon how the via contacts are made to the buffer by the wiring segments carrying the buffer signals.
申请公布号 WO2004015744(A2) 申请公布日期 2004.02.19
申请号 WO2003US24863 申请日期 2003.08.08
申请人 LEOPARD LOGIC, INC. 发明人 SPADERNA, DIETER, WOLF;WONG, DALE
分类号 H01H73/00;H01L;H01L23/48;H01L27/10;H01L27/118 主分类号 H01H73/00
代理机构 代理人
主权项
地址