发明名称 PATTERNING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a patterning method for reducing imperfect patterns of a semiconductor device due to contamination. SOLUTION: After a trench for trench isolation is formed, the contamination 2 is stuck so as to block the trench (Figure (a)). An insulating film 3 (first film) is formed on a semiconductor substrate 1 by using a CVD method or the like (Figure (b)). The insulating film 3 on the semiconductor substrate 1 is subjected to planarize treatment by using CMP or etch back, and the semiconductor substrate 1 is exposed (Figure (c)). An insulating film 4 (second film) composed of the same material as the insulating film 3 is formed, by using CVD method or the like on the semiconductor substrate 1, from which the contamination 2 is eliminated (Figure (d)). As a result, the insulating film 4 is embedded in the trench for trench isolation. The insulating film 4 on the semiconductor substrate 1 is eliminated by CMP, so that a trench isolating structure, wherein the insulating film 4 is embedded in the trench for trench isolation, can be formed (Figure 1(e)). COPYRIGHT: (C)2004,JPO
申请公布号 JP2004055720(A) 申请公布日期 2004.02.19
申请号 JP20020209302 申请日期 2002.07.18
申请人 RENESAS TECHNOLOGY CORP 发明人 TAMURA KATSUHIKO;SAWAI HIROYOSHI
分类号 H01L21/76;H01L21/3205;H01L21/768;(IPC1-7):H01L21/768;H01L21/320 主分类号 H01L21/76
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