发明名称 MULTI-NODE COMPUTER SYSTEM AND LINK PROCESSING METHOD
摘要 PROBLEM TO BE SOLVED: To facilitate maintenance of a multi-node system comprising a plurality of nodes and a plurality of inter-node switches. SOLUTION: A link processing sequencer 110 receives the instruction of link processing start from a diagnostic processor 30 and generates a 'link processing start' particular code, and a selector 611 transmits the code to an XSW via an encoder 612 and a parallel/serial conversion circuit 613. When receiving the 'link processing start' particular code from a serial / parallel conversion circuit 711 via a decoder 712, a link processing sequencer 210 generates a 'link processing start reception' particular code and transmits the code to a node from a selector 714 via an encoder 715 and a parallel / serial conversion circuit 716. When receiving the 'link processing start reception' particular code from a serial / parallel conversion circuit 614 via a decoder 615, the link processing sequencer 110 reaches a link establishing state. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004056341(A) 申请公布日期 2004.02.19
申请号 JP20020209284 申请日期 2002.07.18
申请人 NEC CORP 发明人 SAWAMURA AKIHIRO
分类号 G06F15/173;G06F15/177;H04L12/28;(IPC1-7):H04L12/28 主分类号 G06F15/173
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