发明名称 VERY HIGH SPEED FLIP-FLOP
摘要 PROBLEM TO BE SOLVED: To provide a very high speed emitter coupled logic (ECL) flip-flop, and to provide an operating method thereof. SOLUTION: The ECL flip-flop supplies a clock level for operation of a logic level higher than a data level. Since a clock operates at the logic level higher than that of data such that level shift to occur in the clock is less than level shift in the data, the clock provides a signal of higher definition in comparison with conventional clock signals. The ECL flip-flop can operated in a data rate fairly higher than that of conventional flip-flops. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004056829(A) 申请公布日期 2004.02.19
申请号 JP20030276540 申请日期 2003.07.18
申请人 NORTHROP GRUMMAN CORP 发明人 YEPP RONALD J
分类号 H03K19/086;H03K3/012;H03K3/286;H03K3/2885;H03K3/289;(IPC1-7):H03K3/286 主分类号 H03K19/086
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