| 摘要 |
A non-inverting domino register including a domino stage, a storage stage, a keeper circuit and an output stage. The domino stage includes evaluation logic, coupled between evaluation devices at a pre-charged node, which evaluates a logic function. The storage stage drives a first preliminary output node and includes a pull-up device and a pull-down device both responsive to the pre-charged node, and a second pull-down device responsive to the clock signal. The keeper circuit is a cross-coupled pair of inverters coupled between the first preliminary output node and a second preliminary output node. The output stage includes a pair of pull-up and pull-down devices for driving an output node. The first pull-up device and the first pull-down device are both responsive to the pre-charged node, and the second pull-up device and the second pull-down device are both responsive to the second preliminary output node.
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