发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE USING DAMASCENE LINE
摘要 PURPOSE: A method for manufacturing a semiconductor device using a damascene line is provided to secure a misalignment margin enough by carrying out a damascene line or bit line forming process. CONSTITUTION: A lower insulating layer(140) and an upper insulating layer are sequentially deposited at the upper portion of a substrate(105). An insulating pattern(150b) is formed by selectively etching the upper insulating layer. A plurality of first contact holes(144) are formed on the resultant structure by selectively etching the lower insulating layer using the insulating pattern. At this time, both sidewalls of the insulating pattern are etched. A plurality of damascene lines are then formed by filling the contact hole and the widened insulating pattern with conductive material. Then, the insulating pattern is selectively etched.
申请公布号 KR20040014840(A) 申请公布日期 2004.02.18
申请号 KR20020047588 申请日期 2002.08.12
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 PARK, JE MIN
分类号 H01L21/28;H01L21/60;H01L21/768;H01L21/8242;H01L27/108;(IPC1-7):H01L21/28 主分类号 H01L21/28
代理机构 代理人
主权项
地址