发明名称 Process for forming a buried cavity in a semiconductor material wafer and a buried cavity
摘要 The process comprises the steps of forming, on top of a semiconductor material wafer, a holed mask having a lattice structure and comprising a plurality of openings each having a substantially square shape and a side with an inclination of 45° with respect to the flat of the wafer; carrying out an anisotropic etch in TMAH of the wafer, using said holed mask, thus forming a cavity, the cross section of which has the shape of an upside-down isosceles trapezium; and carrying out a chemical vapor deposition using TEOS, thus forming a TEOS layer which completely closes the openings of the holed mask and defines a diaphragm overlying the cavity and on which a suspended integrated structure can subsequently be manufactured.
申请公布号 US6693039(B2) 申请公布日期 2004.02.17
申请号 US20010797206 申请日期 2001.02.27
申请人 STMICROELECTRONICS S.R.L. 发明人 ERRATICO PIETRO;SACCHI ENRICO;VILLA FLAVIO;BARLOCCHI GABRIELE;CORONA PIETRO
分类号 H01L21/822;B81C1/00;G01N37/00;H01L21/306;H01L21/308;H01L21/314;H01L21/316;H01L27/04;(IPC1-7):H01L21/302 主分类号 H01L21/822
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