摘要 |
In one embodiment of the invention, a clamping circuit clamps an input signal to reduce overshoot and ringback. A pulse generator generates a pulse signal having a pulse interval from the input signal and a delayed signal. The input signal transitions from a first level to a second level. The delayed signal is derived from the input signal. A controller generates a control signal responsive to the pulse signal. A switching circuit clamps one of the overshoot and the ringback of the input signal within the pulse interval upon receipt of the control signal.
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