| 摘要 |
A semiconductor device with adjustable number of pages and page depth is disclosed. The semiconductor device includes multiple memory cell array blocks, a page control circuit for generating a control signal which varies the number of pages and the page depth in response to a page control signal, and a sense amplifying and write driving circuit. The page control circuit controls a row address and a column address to generate the control signal, that is, to vary the number of pages and the page depth. The sense amplifying and write driving circuit senses, amplifies and outputs data from a memory cell array block, and writes data into a memory cell array block in response to the control signal. The page control circuit includes an address buffer, a block controller and a control signal generator. The address buffer buffers the most significant bit (MSB) of the row address and outputs the buffered result, or ignores the MSB depending on the page control signal. The block controller generates a block select signal in response to the MSB and a bit next to the MSB of the row address, and the control signal generator, depending on the page control signal, selects between the MSB of the column address and the block select signal as the control signal.
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