Request queuing system for a PCI bridge

摘要

A PCI and PCI-X bus-bridging method and apparatus is described. Posted memory write requests and requests not allowed to execute before a prior posted memory write are written to one queue. Requests that are allowed to pass a posted memory write are written to a separate second queue. Requests at the head of these queues receiving a RETRY response or failing to execute completely are removed from the queue and stored in a Retry List. Requests execute depending on which one of them wins control of the destination bus. The posted memory writes queue and any request not allowed to pass a posted memory write are blocked from executing if there is a location in the Retry List occupied by a posted memory write.