发明名称 |
OUTPUT CONTROL CIRCUIT, DRIVING CIRCUIT, ELECTROOPTICAL DEVICE, AND ELECTRONIC INSTRUMENT |
摘要 |
PURPOSE: To eliminate the duplication of a sampling signal in an output control circuit and a driving circuit used with a transfer means applying cascade connection to a plurality of unit circuits successively shifting a start pulse by syncronizing with a clock signal. CONSTITUTION: A data line driving circuit 200 is provided with a shift register section 210 applying the cascade connection to each shift register unit circuit Ua1 to Uan+2 and an output signal control section 220 consisting of each arithmetic unit circuit Ub1 to Ubn+1. NAND circuits 514 limit the effective period of time of the negative sampling signal based on the output signals of NAND circuits 511 in the next stage arithmetic unit circuit.
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申请公布号 |
KR20040014345(A) |
申请公布日期 |
2004.02.14 |
申请号 |
KR20030054903 |
申请日期 |
2003.08.08 |
申请人 |
SEIKO EPSON CORPORATION |
发明人 |
FUJITA SHIN |
分类号 |
G02F1/133;G09G3/20;G09G3/36;(IPC1-7):G09G3/36 |
主分类号 |
G02F1/133 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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