发明名称 GATE MASK WITH UNEVENNESS DUMMY PATTERN
摘要 PURPOSE: A gate mask with an unevenness dummy pattern is provided to form a stable gate pattern by forming the unevenness dummy pattern in a predetermined portion of a gate to be in contact with an interface of an active region of a semiconductor substrate, and to avoid the leakage current by preventing a parasitic transistor from being formed in the interface of the active region. CONSTITUTION: A mask(100) is prepared in which a gate pattern is to be formed. A gate of a predetermined width is formed in the mask, crossing a selected portion of an active/inactive region of a semiconductor substrate. The center of the dummy pattern corresponds to an interface of the active region(200) at the side surface of the gate. The unevenness dummy patterns(350-1,350-2,350-3) are separated from each other by a predetermined interval.
申请公布号 KR20040013460(A) 申请公布日期 2004.02.14
申请号 KR20020046389 申请日期 2002.08.06
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 AHN, TAE HYEON;JUNG, JAE HUN
分类号 H01L21/027;(IPC1-7):H01L21/027 主分类号 H01L21/027
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