| 摘要 |
A method of reducing variations in nanoscale circuit connections, includes: placing a first connector between a first addressing wire and a first nanowire in a partial circuit; and applying bias to the partial circuit so that a second connector is placed between a second addressing wire and a second nanowire. This method of bias connections is repeated for each wire in the full circuit. Thus, bias is used to influence the positioning of connectors on additional wires (if any) in the full circuit. A nanoscale circuit, includes: a first addressing wire; a first nanowire; a first connector connected placed between the first addressing wire and a first nanowire in a partial circuit in a random manner; a second addressing wire; a second nanowire; and a second connector placed between the second addressing wire and a second nanowire by application of bias to the partial circuit.
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