发明名称 MEMORY WITH A BIT LINE BLOCK AND/OR A WORD LINE BLOCK FOR PREVENTING REVERSE ENGINEERING
摘要 A method and circuit for blocking unauthorized access to at least one memory cel lin a semiconductor memory. The method includes providing a switch and/or a link which assumes an open state when access to the at least one memory cell is to be blocked; and coupling a data line associated with the at least one memory cell to a constant voltage source is response to the switch or link assuming an open state.
申请公布号 WO02091190(A3) 申请公布日期 2004.02.12
申请号 WO2002US07587 申请日期 2002.03.12
申请人 HRL LABORATORIES, LLC;CLARK, JR., WILLIAM, M.;CHOW, LAP-WAI;BAUKAS, JAMES, P. 发明人 CLARK, JR., WILLIAM, M.;CHOW, LAP-WAI;BAUKAS, JAMES, P.
分类号 G11C17/18;G06F12/14;G11C7/12;G11C7/18;G11C7/24;G11C16/02;G11C16/22;H01L21/8246;H01L21/8247;H01L27/02;H01L27/10;H01L27/112;H01L27/115 主分类号 G11C17/18
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