发明名称 |
LEVEL SHIFTER CIRCUIT AND DISPLAY DEVICE PROVIDED THEREWITH |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a level shifter circuit which reduces power consumption. <P>SOLUTION: First and second level shifters LS1 and LS2 which respectively input two kinds of clock signals CK1 and CK2 whose high level periods do not overlap with each other are provided with control transistors N5 and N5 and control lines CL1 and CL2. Then their level shifting operations are stopped by inhibiting a feedthrough current from flowing to an offsetter part 2 and a level shift part 3 of the level shifter LS2 when an output signal OUT1 is is high level, and also inhibiting a feedthrough current from flowing into an offsetter part 2 and a level shift part 3 of the level shifter LS1 when an output signal OUT2 is high level. Consequently, the power consumption in a specified period in a non-active period of the clock signals CK1 and CK2 corresponding to an active period of the other clock signal is reduced. <P>COPYRIGHT: (C)2004,JPO |
申请公布号 |
JP2004046085(A) |
申请公布日期 |
2004.02.12 |
申请号 |
JP20030104510 |
申请日期 |
2003.04.08 |
申请人 |
SHARP CORP |
发明人 |
MURAKAMI YUICHIRO;GYOTEN SEIJIRO;WASHIO HAJIME;MATSUDA EIJI;TSUJINO YUKIO;HAYASHI SHUNSUKE |
分类号 |
G02F1/1345;G02F1/133;G09G3/20;G09G3/36;G11C19/00;H03K19/00;H03K19/0185 |
主分类号 |
G02F1/1345 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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