发明名称 CLOCK SIGNAL GENERATOR FOR RECORDING AND ITS METHOD
摘要 PROBLEM TO BE SOLVED: To provide a recording clock signal generating circuit for generating the suitable recording clock signal in an information recorder for recording the information on a recording medium. SOLUTION: A composite signal Spc, in which a prepit signal is superimposed on a wobble signal, is produced in accordance with a radial push-pull signal Spp, from which a noise component is removed. In accordance with the composite signal Spc, the wobble signal SWB having the phaseθ0 eliminating the time fluctuation and the prepit signal SPD are produced, and the phases are compared to produce a phase adjusting signal SCNT corresponding to the phase differenceθe. An average valueθr is produced by holding a history of the phase differenceθe, and the phase differenceθe and the average valueθr are compared, then the phaseθ0 of the wobble signal SWB is shifted by the phase differenceθe only when the phase differenceθe exists in the range of (θr±W), and the wobble signal SWB of a phaseθ1 synchronized with the prepit signal SPD is produced. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004046924(A) 申请公布日期 2004.02.12
申请号 JP20020199656 申请日期 2002.07.09
申请人 PIONEER ELECTRONIC CORP 发明人 TAWARAGI YUUJI
分类号 G11B7/00;G11B7/0045;G11B7/007;G11B20/14;G11B27/19;G11B27/24;(IPC1-7):G11B20/14;G11B7/004 主分类号 G11B7/00
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